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External photographic wireless communication device
An external photographic wireless communication device and related systems including an external photographic wireless communication device for connection to a...
Integrated circuit heat dissipation using nanostructures
An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature...
Structure for reduced source and drain contact to gate stack capacitance
A structure of a semiconductor device is described. A device structure including a gate structure, a source region and a drain region is disposed on a first...
Subsurface wires of integrated chip and methods of forming
Various embodiments include methods and integrated circuit structures. One method includes masking a structure with a mask to cover at least a portion of the...
TCAM structures with reduced power supply noise
A ternary content addressable memory (TCAM) structure may activate individual groups of subarrays in the TCAM structure, during a non-search mode, at...
Electrostatic discharge protection for a magnetoresistive sensor
A magneto-resistive (MR) sensor protection circuit is disclosed, for the protection of an MR sensor. The MR sensor may have a safe operating voltage range, a...
Video tracker having digital signal processor
Various embodiments include solutions for analyzing three-dimensional video data. Various embodiments include a system having: at least one sensor for detecting...
Storing and resuming application runtime state
Execution of an application is suspended and the runtime state of the application is collected and persisted. Maintenance operations may then be performed on...
Optimizing provisioning through automated virtual machine template
Software that dynamically updates virtual machine templates at deterministic intervals in order to reduce patching time, by performing the following operations:...
Aligning FIFO pointers in a data communications lane of a serial link
Aligning FIFO pointers includes resetting, by a write control block coupled to a write side of the FIFO, write pointers to an initial value. Then, iteratively,...
Bank-level fault management in a memory system
According to one aspect, bank-level fault management in a memory system is provided. The memory system includes a plurality of ranks, each rank including a...
Virtual grouping of memory
The present disclosure includes identifying, in a memory system, a capacity for each of a plurality of memory modules for a first memory channel having a first...
Circuit for detecting structural defects in an integrated circuit chip,
methods of use and manufacture and...
Detection circuits, methods of use and manufacture and design structures are provided herein. The structure includes at least one signal line traversing one or...
High power radio frequency (RF) in-line wafer testing
Approaches for performing in line wafer testing are provided. An approach includes a method that includes generating a radio frequency (RF) test signal, and...
Bearing assembly and method
A bearing assembly can comprise: a base member including at least one base ramp; a carriage member including: a first surface defining a bearing channel, the...
Seal systems for use in turbomachines and methods of fabricating the same
A seal system, for an apparatus that includes a rotatable portion with airfoils coupled thereto and a stationary portion with an inner surface, includes an...
Splice tray cabinet
Voicemail greeting fingerprint matching to differentiate between human and
Techniques are disclosed for using voicemail fingerprints to detect when a call has been answered by voicemail. A voicemail fingerprint of a known voicemail...
Method for decoupling caller routing services and off-net data acquisition
Call routing system and method for routing calls based upon an initiator's current location in a wireless communications network. The call routing system...
Reconfigurable bandstop filter
A reconfigurable bandstop filter and methods of designing and reconfiguring the bandstop filter are disclosed. The reconfigurable bandstop filter includes a...
Dual shallow trench isolation (STI) structure for field effect transistor
Various embodiments include structures for field effect transistors (FETs). In various embodiments, a structure for a FET includes: a deep n-type well; a...
FinFET source-drain merged by silicide-based material
A method includes conducting a laser-based anneal treatment on a metal layer positioned above and in direct contact with a top portion of a silicon cap layer...
Scaling voltages in relation to die location
The method includes identifying, by one or more computer processors, a location that corresponds to an integrated circuit chip on a wafer. The method further...
Gate-all-around fin device
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality...
Integration of heterojunction bipolar transistors with different base
Device structures and fabrication methods for a heterojunction bipolar transistor. A first base layer is formed on a first device region of a substrate. A first...
CMOS protection during germanium photodetector processing
A method of protecting a CMOS device within an integrated photonic semiconductor structure is provided. The method may include depositing a conformal layer of...
Semiconductor device with different fin pitches
A method for forming a semiconductor device includes forming a first fin and a second fin on a substrate, the first fin arranged in parallel with the second...
Whole wafer edge seal
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of creating a non-permeable edge seal around a...
Autonomous safety and security device on an unmanned platform under
command and control of a cellular phone
A safety and security device is housed on either an unmanned aerial vehicle or its land-based docking station and is combined with a cellular telephone for...
Array of processor core circuits with reversible tiers
Embodiments of the invention relate to an array of processor core circuits with reversible tiers. One embodiment comprises multiple tiers of core circuits and...
MEMS based photonic devices and methods for forming
Various particular embodiments include a primary waveguide including an end section; cantilevered waveguides, each cantilevered waveguide including an end...
Optimizing generation of test configurations for built-in self-testing
Technical solutions are described for optimizing a set of test configurations used for testing an electronic circuit that includes latches. An example method...
Broad spectrum antiviral and methods of use
A method for the prevention or treatment of Influenza virus infection or Adenovirus infection by administering an effective amount of a compound of Formula (I),...
High data rate multilevel clock recovery system
Digital receiver systems and clock recovery techniques for use in digital receiver systems are provided to implement asynchronous baud-rate clock recovery...
Creating a dynamic Huffman table
Techniques for creating a dynamic Huffman table in hardware are provided. In one aspect, a method for encoding data includes the steps of: implementing dynamic...
There is provided a communication connector for improving signal transmission performance, the communication connector including a cable termination component...
Profile control over a collector of a bipolar junction transistor
Device structures for a bipolar junction transistor. A layer is formed on a top surface of a substrate. A trench is formed in the layer and has a plurality of...
Solid state diffusion doping for bulk finFET devices
A method of forming a semiconductor device comprises forming a first fin on a substrate, depositing an insulator layer on the substrate adjacent to the first...
Stable work function for narrow-pitch devices
A work function setting metal stack includes a configuration of layers including a high dielectric constant layer and a diffusion prevention layer formed on the...
Conductive pillar shaped for solder confinement
Pillar-type connections and methods for fabricating a pillar-type connection. A conductive layer is formed on a bond pad. A second conductive layer is formed on...
Nano deposition and ablation for the repair and fabrication of integrated
An apparatus for and methods of repairing and manufacturing integrated circuits using the apparatus. The apparatus, comprising: a vacuum chamber containing: a...
Debonding temporarily bonded semiconductor wafers
Described methods and apparatus provide a controlled perturbation to an adhesive bond between a device wafer and a carrier wafer. The controlled perturbation,...
Matchline precharge architecture for self-reference matchline sensing
The present disclosure relates to content addressable memories (CAM), and more particularly, to a searchable CAM structure having self-reference matchline...
Data enrichment using business compendium
Embodiments relate to enrichment of a data warehouse utilizing a business compendium. Embodiments may employ a process comprising data standardization and...
Substrate edge clamping force tester
An apparatus and methods for measuring the clamping force applied to a substrate by clamping elements of a substrate holder. The apparatus include a pneumatic...
Micro-electro-mechanical system (MEMS) structures and design structures
Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming at least one fixed...
System for controlling a tissue-stapling operation
An endoscopic stapler is disclosed. The stapler includes a staple member and an anvil member. The staple member may include a staple housing and the staple...