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Patent # Description
US-9,954,529 Ultra dense vertical transport FET circuits
Logic circuits, or logic gates, are disclosed comprising vertical transport field effect transistors and one or more active gates, wherein the number of...
US-9,954,137 Photodetector and methods of manufacture
Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The...
US-9,954,002 Multi-gate field effect transistor (FET) including isolated FIN body
Aspects of the disclosure provide a multi-gate field effect transistor (FET) formed on a bulk substrate that includes an isolated fin and methods of forming the...
US-9,953,940 Corrosion resistant aluminum bond pad structure
A method of manufacturing a bond pad structure may include depositing an aluminum-copper (Al--Cu) layer over a dielectric layer; and depositing an ...
US-9,953,831 Device structures with multiple nitrided layers
Device structures for field-effect transistors and methods of forming device structures for a field-effect transistor. A first dielectric layer is formed on a...
US-9,953,727 Circuit and method for detecting time dependent dielectric breakdown (TDDB) shorts and signal-margin testing
The present disclosure relates to a structure which includes a twin-cell memory which is configured to program a plurality of write operations, a current sense...
US-9,953,698 Overvoltage protection for a fine grained negative wordline scheme
A fine grained negative wordline scheme for SRAM memories is disclosed. The scheme includes a circuit having a static random access memory (SRAM) cell including...
US-9,953,307 Method of payment assessment to clinical study volunteers
Systems, methods, and other embodiments associated with generating payments to volunteers in clinical trials are described. In one embodiment, a method includes...
US-9,952,874 Operation of a multi-slice processor with selective producer instruction types
Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a...
US-9,952,861 Operation of a multi-slice processor with selective producer instruction types
Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a...
US-9,952,651 Deterministic current based frequency optimization of processor chip
A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory, where the memory includes a program...
US-9,952,401 Inline splicing module for easy access to cable subgroups
An inline splicing module for use in combination with one or more fiber subgroup cables each having a plurality of individual fibers includes a backplane...
US-9,951,758 Rotational actuators
An actuator includes a drum defining a longitudinal axis and having axially opposed first and second end portions that are rotatable relative to one another...
US-9,949,451 Bioreactor using macroalgae
The disclosure features a bioreactor for the growth of macroalgae and methods for using the bioreactor to maintain optimal nutrient levels for the organisms in...
US-D816,244 Privacy pod
US-9,948,746 Request processing according to degradation monitoring
In an approach for adjusting an order of actions to process a request, a processor receives a request that includes a set of actions to be performed in a first...
US-9,947,743 Structures and methods for long-channel devices in nanosheet technology
Techniques for providing supporting structures for suspended nanosheets/wires in long-channel devices are provided. In one aspect, a method of forming a device...
US-9,947,664 Semiconductor device and method of forming the semiconductor device
A semiconductor device includes a first vertical field effect transistor (VFET) formed on a substrate, and including a first fin and a first gate formed on the...
US-9,947,598 Determining crackstop strength of integrated circuit assembly at the wafer level
A methodology and associated wafer level assembly of testing crackstop structure designs. The wafer level semiconductor assembly includes: a substrate structure...
US-9,947,593 Extra gate device for nanosheet
A method for forming semiconductor devices includes forming a highly doped region. A stack of alternating layers is formed on the substrate. The stack is...
US-9,947,573 Lateral PiN diodes and schottky diodes
Lateral PiN diodes and Schottky diodes with low parasitic capacitance and variable breakdown voltage structures and methods of manufacture are disclosed. The...
US-9,947,479 Volumetric efficiency wet electrolyte capacitor having a fill port and terminations for surface mounting
A wet electrolytic surface mount capacitor has a body defining an interior area and having a fill port formed through a wall of the body. A capacitive element...
US-9,946,620 Memory built-in self test system
A memory built-in self test ("BIST") system comprises: a controller; a single port memory engine coupled to one or more single port memories; and a non-single...
US-9,946,564 Adjusting virtual machine migration plans based on alert conditions related to future migrations
Migration of virtual machines within a computing environment is facilitated. A processor obtains a current virtual machine to host mapping in the computing...
US-9,946,152 Extreme ultraviolet lithography photomasks
The present disclosure relates to semiconductor structures and, more particularly, to modified surfaces of extreme ultraviolet lithography photomasks and...
US-9,945,940 Systems and methods of wireless position tracking
Position and orientation tracking systems and methods include a transmitting antenna transmitting a radio frequency (RF) signal. At least one receiving antenna...
US-9,945,695 Proximity sensor
A proximity sensor includes an active sensor, a passive target, and a measurement circuit. The active sensor includes an active resonant tank circuit that...
US-9,944,518 Method of manufacture MEMS switches with reduced voltage
An approach includes a method of fabricating a switch. The approach includes forming a first fixed electrode and a second fixed electrode, forming a first...
US-9,944,517 Method of manufacturing MEMS switches with reduced switching volume
An approach includes a method of fabricating a switch. The approach includes forming a first fixed electrode and a second fixed electrode, forming a first...
US-9,943,923 Method to improve process stabilization
Systems and methods for providing an improved start in a welding are provided. The system may include a power circuit and a control circuit: The power circuit...
US-9,943,315 Devices and methods for excluding the left atrial appendage
Devices and methods for occluding the left atrial appendage (LAA) to prevent blood from clotting within the LAA and subsequently embolizing, particularly in...
US-D815,673 Recirculating bearing
US-D815,519 Electrode packaging
US-D815,429 Bottle holster
US-9,942,872 Method and apparatus for wireless device location determination using signal strength
A method of wireless device location determination includes defining a region of interest comprising a plurality of sensors. A reference frame and a grid...
US-9,942,761 User access verification
Embodiments are directed to a method of providing access verification for a system that includes activating a security control device, which is in ...
US-9,942,717 Method and apparatus for direction-aware device location
A method of direction-aware device location includes establishing a region of interest comprising a plurality of wireless devices. A reference frame is then...
US-9,941,300 Structure and method for fully depleted silicon on insulator structure for threshold voltage modification
A method for fabricating a fully depleted silicon on insulator (FDSOI) device is described. A charge trapping layer in a buried oxide layer is provided on a...
US-9,941,179 Capacitive measurements of divots in semiconductor devices
Approaches for characterizing a shallow trench isolation (STI) divot depth are provided. The approach includes measuring a first capacitance at a first region...
US-9,940,986 Electrostatic discharge protection structures for eFuses
The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge (ESD) protection structures for eFuses. The...
US-9,940,457 Detecting a cryogenic attack on a memory device with embedded error correction
Embodiments of the present disclosure provide a method, computer program product, and system for monitoring a dynamic random-access memory (DRAM) device to...
US-9,940,430 Burn-in power performance optimization
Method of burn-in power optimization which includes: testing integrated circuit devices to record a performance speed for each of the integrated circuit...
US-9,940,417 Simulating reference voltage response in digital simulation environments
Embodiments herein describe a digital simulation environment that changes the delay of a digital signal to represent different analog reference voltages. For...
US-9,940,393 Electronic personal assistant privacy
A method comprises receiving a first user communication, accessing a directory entry associated with the user, accessing, by a processor, a database stored in a...
US-9,940,302 Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor array
Embodiments of the invention relate to processor arrays, and in particular, a processor array with interconnect circuits for bonding semiconductor dies. One...
US-9,940,191 Concurrent error detection in a ternary content-addressable memory (TCAM) device
A plurality of data words are written into a TCAM; each has binary digits and don't-care digits. Contemporaneously, for each of the words: a first checksum is...
US-9,939,880 Voltage and frequency balancing at nominal point
In an approach for determining voltage and frequency pairs, the computer identifies an integrated circuit design. The computer identifies a timing model...
US-9,939,449 Diagnostic and therapeutic methods and products related to anxiety disorders
The present disclosure provides methods for diagnosing and treating anxiety disorders in female subjects. Diagnosis and treatment of such anxiety disorders are...
US-9,938,833 Methods, systems, and devices for designing and manufacturing flank millable components
Methods, systems, and devices for designing and manufacturing flank millable components. In one embodiment, devices, systems, and methods for designing a flank...
US-9,938,137 Micro-electro-mechanical system (MEMS) structures and design structures
Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a ...
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