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| Patent # | Description |
|---|---|
| US-7,886,342 |
Distributed environment controlled access facility A computer implemented web based access control facility for a distributed environment, which allows users to request for access, take the request through... |
| US-7,886,253 |
Design structure for performing iterative synthesis of an integrated
circuit design to attain power closure A design structure that performs iterative synthesis of an integrated circuit design to attain power closure is described. In one embodiment, the design... |
| US-7,886,246 |
Methods for identifying failing timing requirements in a digital design Methods for identifying failing timing requirements in a digital design. The method includes identifying at least one timing test in the digital design that has... |
| US-7,886,240 |
Modifying layout of IC based on function of interconnect and related
circuit and design structure Modifying a layout of an integrated circuit (IC) based on a function of an interconnect therein and a related circuit and design structure are disclosed. In one... |
| US-7,886,237 |
Method of generating a functional design structure A method in a computer-aided design system for generating a functional design model of a circuit that compensates for changes in resistance of a buried resistor... |
| US-7,886,210 |
Apparatus for pipelined cyclic redundancy check circuit with multiple
intermediate outputs A CRC redundancy calculation circuit is presented which is pipelined to run at high frequencies and configured to operate on an arbitrary multiple of the base... |
| US-7,885,958 |
Method, apparatus and computer program product for organizing hierarchical
information A method, apparatus, and computer program product for organizing hierarchical information according to a defined objective. |
| US-7,885,533 |
External photographic wireless communication device An external photographic wireless communication device for connection to a camera body having a hot shoe connector for connecting to the camera body and a hot... |
| US-7,885,498 |
Optical fiber microscopy launch system and method A sample slide, launch system, and method for microscopy having two optical fibers positioned proximate a sample slide with optical fiber mounting elements to... |
| US-7,884,599 |
HDL design structure for integrating test structures into an integrated
circuit design A hardware description language (HDL) design structure for performing device-specific testing and acquiring parametric data on integrated circuits, such that... |
| US-7,884,475 |
Conductor structure including manganese oxide capping layer A microelectronic structure includes a dielectric layer located over a substrate. The dielectric layer is separated from a copper containing conductor layer by... |
| US-7,883,990 |
High resistivity SOI base wafer using thermally annealed substrate A method of forming a semiconductor-on-insulator (SOI) substrate using a thermal annealing process to provide a semiconductor base wafer having a thin high... |
| US-7,883,962 |
Trench DRAM cell with vertical device and buried word lines A DRAM array having trench capacitor cells of potentially 4F.sup.2 surface area (F being the photolithographic minimum feature width), and a process for... |
| US-7,883,916 |
Optical sensor including stacked photosensitive diodes A complementary metal-oxide-semiconductor (CMOS) image sensor comprises a first photosensitive diode comprising a first semiconductor material is formed in a... |
| US-7,882,469 |
Automatic verification of adequate conductive return-current paths After finding the shortest conductive signal return-current path for each signal, the invention assesses whether each conductive return-current path is adequate.... |
| US-7,882,463 |
Integrated circuit selective scaling The invention includes a solution for selectively scaling an integrated circuit (IC) design by: layer, region or cell, or a combination of these. The selective... |
| US-7,882,460 |
Method of circuit power tuning through post-process flattening A method is provided for optimizing a hierarchical circuit design containing at least one reused cell. A first optimization is performed on the circuit design to... |
| US-7,882,455 |
Circuit and method using distributed phase change elements for across-chip
temperature profiling Disclosed is an across-chip temperature sensing circuit and an associated method that can be used to profile the across-chip temperature gradient. The... |
| US-7,882,410 |
Launch-on-shift support for on-chip-clocking A method to perform launch-on-shift scanning for integrated circuits having multiple clock domains is presented. An integrated circuit includes both capture... |
| US-7,882,334 |
Processor pipeline architecture logic state retention systems and methods A system, method and program product for retaining a logic state of a processor pipeline architecture are disclosed. A comparator is positioned between two... |
| US-7,882,324 |
Method and apparatus for synchronizing memory enabled systems with
master-slave architecture Embodiments of the invention generally provide a system, method and memory device for accessing memory. One embodiment includes synchronization circuitry... |
| US-7,882,302 |
Method and system for implementing prioritized refresh of DRAM based cache A method for implementing prioritized refresh of a multiple way, set associative DRAM based cache includes identifying, for each of a plurality of sets of the... |
| US-7,881,135 |
Method for Q.sub.CRIT measurement in bulk CMOS using a switched capacitor
circuit A test setup for estimating the critical charge of a circuit under test (CUT) uses a charge injection circuit having a switched capacitor that is selectively... |
| US-7,881,028 |
E-fuse used to disable a triggering network A device and/or circuit having an e-fuse is provided to disable a triggering network, and more specifically, an e-fuse is used to disable an electrostatic... |
| US-7,880,761 |
Wireless photographic communication system and method An external wireless communication module for enabling a camera to communicate with a remote device. The wireless communication module includes one or more... |
| US-7,880,370 |
Piezoelectric composite with tapered beam An energy harvesting system includes a composite structure that includes a base spring and a first piezoelectric element. The first piezoelectric element is... |
| US-7,880,160 |
Memory using tunneling field effect transistors A memory includes a first tunneling field effect transistor including a first drain and a first source, the first drain coupled to a first resistive memory... |
| US-7,880,158 |
Phase-change TaN resistor based triple-state/multi-state read only memory The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased... |
| US-7,879,716 |
Metal seed layer deposition A method and structure for reducing the corrosion of the copper seed layer during the fabrication process of a semiconductor structure. Before the structure (or... |
| US-7,879,678 |
Methods of enhancing performance of field-effect transistors and
field-effect transistors made thereby Methods of enhancing the performance of a field-effect transistor (FET) by providing a percolating network of metallic islands to the inversion layer of the FET... |
| US-7,879,660 |
Semiconductor structures integrating damascene-body FinFET's and planar
devices on a common substrate and... Methods of forming a semiconductor structure having FinFET's and planar devices, such as MOSFET's, on a common substrate by a damascene approach, and... |
| US-7,879,650 |
Method of providing protection against charging damage in hybrid
orientation transistors In a method of fabricating a CMOS structure, a bulk device can be formed in a first region in conductive communication with an underlying bulk region of the... |
| US-7,878,769 |
Automatic transmission pump-priming device A pump-priming device configured to fit within the pump inlet circuit formed in the valve body of an automatic transmission is disclosed. The present pump... |
| US-7,878,434 |
Wood chipper A wood chipper includes a housing having an inlet opening and a discharge outlet with a chipper disk rotatably mounted in the housing and having a chipper knife... |
| US-7,878,191 |
Solar collector stabilized by cables and a compression element A solar collector system including solar elements connected to form an array for intercepting the sun's radiation, a compression element that is positioned... |
| US-7,877,714 |
System and method to optimize semiconductor power by integration of
physical design timing and product... A system and method is provided for optimizing semiconductor power by integration of physical design timing and product performance measurements. The method... |
| US-7,877,712 |
System for and method of verifying IC authenticity A verification system disclosed herein uses the unique signatures of an IC to perform authentication of the IC after the IC is shipped to a customer. The... |
| US-7,877,222 |
Structure for a phase locked loop with adjustable voltage based on
temperature A design structure for an apparatus for utilizing a single set of one or more thermal sensors, e.g., thermal diodes, provided on the integrated circuit device,... |
| US-7,877,170 |
Remanent voltage generator tachometer and control for induction machine In a power generating system the remanent voltage of an induction machine is measured. The frequency of the remanent voltage is compared to a predetermined... |
| US-7,876,952 |
Removal of relatively unimportant shapes from a set of shapes A method for reducing a number of shapes, and a computer readable program code adapted to perform said method. The method forms first and second shape patterns.... |
| US-7,876,612 |
Method for reducing leakage current of a memory and related device A method for reducing leakage current of a memory device includes supplying a first voltage to a main wordline driver, supplying a second voltage greater than... |
| US-7,876,547 |
Vertical parallel plate capacitor structures Vertical parallel plate (VPP) capacitor structures that utilize different spacings between conductive plates in different levels of the capacitor stack. The... |
| US-7,875,960 |
Hybrid oriented substrates and crystal imprinting methods for forming such
hybrid oriented substrates A semiconductor structure with an insulating layer on a silicon substrate, a plurality of electrically-isolated silicon-on-insulator (SOI) regions separated from... |
| US-7,875,908 |
Selective links in silicon hetero-junction bipolar transistors using
carbon doping and method of forming same Bipolar transistors and methods of forming the bipolar transistors. The method including forming a P-type collector in a silicon substrate; forming an intrinsic... |
| US-7,875,854 |
Design structure for alpha particle sensor in SOI technology and structure
thereof The invention relates to a design structure, and more particularly, to a design structure for an alpha particle sensor in SOI technology and a circuit thereof.... |
| US-7,875,529 |
Semiconductor devices Methods, devices, modules, and systems providing semiconductor devices in a stacked wafer system are described herein. One embodiment includes a first wafer for... |
| US-7,875,502 |
Semiconductor chips with crack stop regions for reducing crack propagation
from chip edges/corners A chip fabrication method. A provided structure includes: a transistor on a semiconductor substrate, N interconnect layers on the semiconductor substrate and the... |
| US-7,875,444 |
Lignin blockers and uses thereof Disclosed is a method for converting cellulose in a lignocellulosic biomass. The method provides for a lignin-blocking polypeptide and/or protein treatment of... |
| US-7,875,011 |
Cooling, heating, bladder relief, gas, hydration and nutrition chem-bio
suit connectivity system This invention is a Cooling, Heating, Bladder Relief, Gas, Hydration and Nutrition Chem-Bio Suit Connectivity System used connecting various life function... |
| US-7,874,573 |
Convertible toe strap A convertible toe strap for securing a toe area of a snowboarding boot is selectively and repeatedly convertible between different restraining configurations.... |
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